DocumentCode
2598940
Title
Beyond superscalar using FPGAs
Author
Iseli, Christian ; Sanchez, Eduardo
Author_Institution
Logic Syst. Lab., Swiss Federal Inst. of Technol., Lausanne, Switzerland
fYear
1993
fDate
3-6 Oct 1993
Firstpage
486
Lastpage
490
Abstract
A superscalar processor with three execution units is described in details in this paper. The execution units are implemented using reprogrammable field-programmable gate array (FPGA) chips, allowing the user to configure them to best fit the application. Each instruction, composed of 128 bits, directly controls all the processor resources, in a horizontal microprogramming way
Keywords
field programmable gate arrays; microprogramming; multiprocessing systems; programmable logic arrays; FPGAs; execution units; horizontal microprogramming; processor resource control; reprogrammable field-programmable gate array; superscalar processor; user configurable units; Clocks; Field programmable gate arrays; Laboratories; Paper technology; Process control; Program processors; Programmable control; Programmable logic arrays; Reduced instruction set computing; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1993. ICCD '93. Proceedings., 1993 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-4230-0
Type
conf
DOI
10.1109/ICCD.1993.393328
Filename
393328
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