Title :
Library-adaptively integrated data path synthesis for DSP systems
Author :
Jou, Jer-Min ; Kuang, Shiann-Rong
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Abstract :
A new algorithm for the integrated data path synthesis of high-performance DSP systems has been proposed. The integrated synthesis problem, that is the combined problem of module selection, scheduling, and allocation, is systematically formulated as a clique-partition problem of mixed-vertex compatibility graph on a module library and is solved simultaneously. We introduce a global cost function based on clique partition heuristic to evaluate each decision along the synthesis process. Salient features, such as library-adaptive and integrated processing (i.e., make all resources, including operators and interconnects, tradeoffs), are processed in the algorithm and experimental results are quite encouraged
Keywords :
circuit layout; digital signal processing chips; high level synthesis; scheduling; clique partition heuristic; clique-partition problem; global cost function; high-performance DSP systems; integrated data path synthesis; integrated processing; mixed-vertex compatibility graph; Clocks; Cost function; Delay; Digital signal processing; High level synthesis; Libraries; Partitioning algorithms; Real time systems; Simulated annealing; Space exploration;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1993. ICCD '93. Proceedings., 1993 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-4230-0
DOI :
10.1109/ICCD.1993.393348