Title :
Design of a novel high-performance pre-discharge flip-flop (PDFF)
Author :
Li, David ; Chuang, Pierce ; Sachdev, Manoj
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada
Abstract :
Flip-flop is a vital component for high-performance and reliable deep-pipelined systems in digital microprocessors. In this paper, a new pre-discharge flip-flop (PDFF) is proposed. The performance advantage of PDFF comes from the fact that its critical path is reduced significantly to only three transistors in the worst case. A detailed comparison is carried out between the proposed PDFF and previous published single-ended and pure differential flip-flops. Simulation results in the 65nm CMOS technology have shown that PDFF is able to achieve at least 15% performance improvement and 24% PDP reduction when compared to the previous proposed flip-flops.
Keywords :
CMOS digital integrated circuits; flip-flops; nanoelectronics; transistors; CMOS technology; differential flip-flops; high-performance pre-discharge flip-flop; size 65 nm; transistors; Clocks; Delay; Flip-flops; Latches; Partial discharges; Power demand; Transistors;
Conference_Titel :
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-6806-5
Electronic_ISBN :
978-1-4244-6804-1
DOI :
10.1109/NEWCAS.2010.5603782
