DocumentCode
2599798
Title
Fault-tolerant content addressable memory
Author
Lo, Jien-Chung
Author_Institution
Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA
fYear
1993
fDate
3-6 Oct 1993
Firstpage
193
Lastpage
196
Abstract
We analyze the error behavior of content addressable memories and provide necessary and sufficient conditions to protect them. Single error tolerant designs are demonstrated for bit- and byte-organized content addressable memories. This level of protection is equivalent to that of the conventional ECC protection in memory subsystems
Keywords
content-addressable storage; error analysis; fault tolerant computing; memory architecture; ECC protection; content addressable memories; error behavior; error tolerant designs; fault tolerant content addressable memory; memory subsystems; Associative memory; CADCAM; Circuit faults; Computer aided manufacturing; Error correction codes; Fault tolerance; Logic; Protection; Random access memory; Read-write memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1993. ICCD '93. Proceedings., 1993 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-4230-0
Type
conf
DOI
10.1109/ICCD.1993.393382
Filename
393382
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