A 1Gbit SDRAM With An Independent Sub-array Controlled Scheme And A Hierarchical Decoding Scheme

Author

Lee, K-C. ; Yoon, H. ; Lee, S-B. ; Lee, J. ; Moon, B-S. ; Kim, K-Y. ; Kim, C-H. ; Cho, S-I.

Author_Institution

DRAM Design, Memory Division, Samsung Electronics, Co., Ltd.

fYear

1997

fDate

12-14 June 1997

Firstpage

103

Lastpage

104

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1997. Digest of Technical Papers., 1997 Symposium on

Print_ISBN

4-930813-76-X

Type

DOI

10.1109/VLSIC.1997.623828

Filename

623828

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