Abstract :
Reversible Logic Technology has emerged as potential logic design style for implementation in Low Power VLSI Design, Quantum Computing and Dissipation less Computing. Based on this technology, a 6×6 Multifunctional Dwivedi - Rao (DR) Gate has been designed for implementation of logical and arithmetical functions. DR gate has been applied for designing of 1-bit ALU to perform NOT, 2 no´s NOR, COPIER, ADD, COUT logical and arithmetical operations in one clock cycle. Comparison of various results shows that proposed DR gate and its application in ALU design is better than its counterpart [16] in terms of Quantum Cost, Logical Operations, Worst Case Delay, Garbage output, Total Boolean function performed etc. Proposed gate has been simulated on VHDL and improvement of 72, 40, 24 logical operations on 4, 3, 2 control input signals respectively, without any garbage output.
Keywords :
VLSI; logic design; logic simulation; low-power electronics; quantum gates; ADD operations; ALU design; COPIER operations; COUT logical operations; NOR operations; NOT operations; arithmetical functions; clock cycle; control input signals; dissipation less computing; garbage output; logic design; logical functions; low power VLSI design; multifunctional DR gate design; multifunctional Dwivedi-Rao gate; quantum computing; quantum cost; reversible logic technology; total Boolean function; word length 1 bit; worst case delay; Boolean functions; Clocks; Complexity theory; Delays; Information technology; Logic gates; Very large scale integration; Multifunctional Gate; Programmable Reversible Logic; Quantum Cost; Worst Case Delay;
