Title :
Degradation Phenomena of Planar Si Devices Due to Surface and Bulk Effects
Author_Institution :
Manager, Integrated Circuit Development, Amperex Electronic Corporation, 99 Bald Hill Road, Cranston, Rhode Island
Abstract :
Planar devices of almost every producer show to some extent serious degradation failures under heavy work conditions. A collector base voltage test at high temperature inverts often the n+-collector surface into a p-layer. High collector leakage currents are resulting. An emitter-base cut off-test at a reverse current of some mA destroys locally the emitter base junction at its surface. A strong decrease of the current amplification factor is resulting. Both failure mechanisms are analysed, some technological solutions to these problems are given.
Keywords :
Capacitance; Capacitance-voltage characteristics; Current measurement; Degradation; Failure analysis; Plastics; Silicon compounds; Temperature; Testing; Voltage;
Conference_Titel :
Reliability Physics Symposium, 1967. Sixth Annual
Conference_Location :
Los Angeles, CA, USA
DOI :
10.1109/IRPS.1967.362394