In-Process Control of Structural Defects in Semiconductor Manufacturing

Crystallographic defects cannot be avoided in manufacturing semiconductor devices. Even if dislocation-free starting material is used, dislocations and other defects can be introduced through the manufacturing process. The influence of such defects upon device properties is reviewed. The scanning oscillator (SOT) approach to achieve the control of structural defects in semiconductor device fabrication is discussed. Critical fabrication steps are pinpointed through SOT charts. Such charts are obtained through correlation of SOT topographs and final yield maps. Typical examples are presented.