DocumentCode :
2601885
Title :
Redundant transformations for BIST testability metrics-based data path allocation
Author :
Yang, Laurence Tianruo ; Muzio, Jon
Author_Institution :
Dept. of Comput. Sci., St. Francis Xavier Univ., Antigonish, NS, Canada
Volume :
2
fYear :
2002
fDate :
2002
Firstpage :
119
Abstract :
In our previous works, we described a BIST testability metric-based high-level data path allocation algorithm to facilitate Built-In Self-Test (BIST) designs. In the present paper, we make use of two types of redundant transformations, which add redundancy that improves test resources to be shared in the data path, to improve our previous data path allocation algorithm. With a variety of benchmarks, we demonstrate the advantage of our approach compared with our previous and other conventional approaches.
Keywords :
built-in self test; circuit layout CAD; controllability; design for testability; high level synthesis; integrated circuit layout; integrated circuit testing; observability; redundancy; BIST testability metric-based allocation; built-in self-test designs; data path allocation algorithm; high-level data path allocation; redundant transformations; Automatic testing; Benchmark testing; Built-in self-test; Circuit testing; Computer science; Controllability; Data analysis; Hardware; High level synthesis; Resource management;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2002. APCCAS '02. 2002 Asia-Pacific Conference on
Print_ISBN :
0-7803-7690-0
Type :
conf
DOI :
10.1109/APCCAS.2002.1115137
Filename :
1115137
Link To Document :
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