DocumentCode
2601892
Title
A New Self-Aligned Nitride MTP Cell with 45nm CMOS Fully Compatible Process
Author
Huang, Chia-En ; Chen, Hsin-Ming ; Lai, Han-Chao ; Chen, Ying-Je ; King, Ya-Chin ; Lin, Chrong Jung
Author_Institution
Nat. Tsing-Hua Univ., Hsinchu
fYear
2007
fDate
10-12 Dec. 2007
Firstpage
91
Lastpage
94
Abstract
A new 45 nm multiple time programming (MTP) cell with self-aligned nitride storage node has been proposed for logic NVM applications. The CMOS fully logic compatible cell has been successfully demonstrated in 45 nm CMOS technology with an ultra small cell size of 0.14 mum2. This cell adapting source side injection programming scheme has a wide on/off window and superior program efficiency. And it also exhibits excellent data retention capability even when logic gate oxide is less than 20 Aring with 45 nm gate length. This new cell provides a promising solution for logic NVM beyond 90 nm node.
Keywords
CMOS logic circuits; CMOS memory circuits; integrated memory circuits; CMOS fully compatible process; CMOS technology; data retention capability; logic NVM applications; multiple time programming; self-aligned nitride MTP cell; size 45 nm; source side injection programming scheme; CMOS logic circuits; CMOS process; CMOS technology; Electronics industry; Industrial electronics; Logic gates; Logic programming; Nonvolatile memory; Space heating; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2007. IEDM 2007. IEEE International
Conference_Location
Washington, DC
Print_ISBN
978-1-4244-1507-6
Electronic_ISBN
978-1-4244-1508-3
Type
conf
DOI
10.1109/IEDM.2007.4418871
Filename
4418871
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