An improved method of convex-shaped block packing based on sequence-pair [VLSI layout]

In this paper, for convex rectilinear block packing problem, we propose (1) a novel algorithm to obtain a packing based on a given sequence-pair in O(n²) time (conventional method needs O(n³) time), where n is the number of rectangular sub-blocks made from convex blocks, (2) a move operation for simulated annealing which is symmetric and can guarantee reachability for the first time, and (3) a method to generate a random adjacent sequence-pair in O(n²) time. By using (1), (2) and (3) together, the time complexity of the inner loop in simulated annealing becomes surely O(n²) time. Experimental results show that the proposed algorithm is faster than the conventional ones in practice and the proposed method can consider wire length as well as packing area.