Title :
45nm Gateless Anti-Fuse Cell with CMOS Fully Compatible Process
Author :
Tsai, Yi-Hung ; Chen, Hsin-Ming ; Chiu, Hsin-Yi ; Shih, Hung-Sheng ; Lai, Han-Chao ; King, Ya-Chin ; Lin, Chrong Jung
Author_Institution :
Nat. Tsing-Hua Univ., Hsin-Chu
Abstract :
A new gateless anti-fuse cell with 45 nm CMOS fully compatible process has been developed for advanced programmable logic applications. This gateless anti-fuse cell processed by pure logic process and decoupled with logic gate oxide has a highly stable and five orders of on/off current window. It also exhibits superior program performance by only 5 V operation with no more than 10 muA programming current. This new nitride gateless anti-fuse cell is a very promising logic OTP solution with fully CMOS compatible process below 90 nm node.
Keywords :
CMOS integrated circuits; logic gates; programmable logic devices; CMOS fully compatible process; advanced programmable logic applications; gateless antifuse cell; logic gate oxide; voltage 5 V; CMOS logic circuits; CMOS process; CMOS technology; Dielectrics; Electronics industry; Fuses; Industrial electronics; Logic programming; Programmable logic arrays; Programmable logic devices;
Conference_Titel :
Electron Devices Meeting, 2007. IEDM 2007. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4244-1507-6
Electronic_ISBN :
978-1-4244-1508-3
DOI :
10.1109/IEDM.2007.4418872
