Making defect avoidance nearly invisible to the user in wafer scale field programmable gate arrays

Field programmable gate arrays have the main features required for interesting wafer scale systems: high flexibility with potential large number of applications, a repeatable cell, and a built in need for switchable flexible routing. Wafer scale work must involve routing around defective cells to build the large system. However, it is important to minimize signal delays so the bypassing of the defective cells is invisible. Experiments on a small test FPGA shows defect avoidance routing using laser link structures produces delays which are about half those produced by the active switches required for the FPGA´s operation