DocumentCode
2602080
Title
Integrate and dump based VGA with an embedded programmable analog FIR filter
Author
Omar, Mohammed ; Emira, Ahmed ; Dessouky, Mohamed
Author_Institution
Ain Shams Univ., Cairo, Egypt
fYear
2010
fDate
20-23 June 2010
Firstpage
77
Lastpage
80
Abstract
This paper presents a novel VGA (Variable Gain Amplifier) with an embedded analog FIR (Finite Impulse Response) filter architecture. The idea is based on a modified version of the integrate and dump circuit. The proposed modifications allow altering the frequency response of the circuit without significantly increasing the circuit complexity along with maintaining acceptable gain control range, noise and linearity. The proposed circuit was designed using 0.13 μm CMOS technology. It consumes 105 μA from 1.2 V supply with an input referred noise of 27.15 nV/√(Hz).
Keywords
CMOS analogue integrated circuits; FIR filters; amplifiers; circuit complexity; CMOS technology; circuit complexity; current 105 muA; dump circuit; embedded programmable analog FIR filter; frequency response; integrate circuit; size 0.13 mum; variable gain amplifier; voltage 1.2 V; Approximation methods; Bandwidth; CMOS integrated circuits; Frequency response; Gain; Receivers; Switching circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location
Montreal, QC
Print_ISBN
978-1-4244-6806-5
Electronic_ISBN
978-1-4244-6804-1
Type
conf
DOI
10.1109/NEWCAS.2010.5603928
Filename
5603928
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