DocumentCode :
2602347
Title :
Random telegraph noise in flash memories - model and technology scaling
Author :
Fukuda, Koichi ; Shimizu, Yuui ; Amemiya, Kazumi ; Kamoshida, Masahiro ; Hu, Chenming
Author_Institution :
Univ. of California, Berkeley
fYear :
2007
fDate :
10-12 Dec. 2007
Firstpage :
169
Lastpage :
172
Abstract :
This paper presents the first statistical model of Vt fluctuation (ΔVtcell) in a floating-gate flash memory due to random telegraph noise. It considers current-path percolation, which generates a large-amplitude-noise tail, caused by dopant induced surface potential non-uniformity It concludes that the impact of scaling is weaker than the widely-accepted 1/LeffWeff trend. 3-σ ΔVtcell is estimated to increase by 1.8x rather than ≫10x from 90 nm to 20 nm technology nodes.
Keywords :
circuit noise; flash memories; nanotechnology; random noise; statistical analysis; surface potential; current-path percolation; dopant induced surface potential; floating-gate flash memories; large-amplitude-noise tail; random telegraph noise; statistical model; technology scaling; Electron traps; Flash memory; Fluctuations; Noise level; Noise measurement; Nonvolatile memory; Semiconductor device noise; Semiconductor process modeling; Telegraphy; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2007. IEDM 2007. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4244-1507-6
Electronic_ISBN :
978-1-4244-1508-3
Type :
conf
DOI :
10.1109/IEDM.2007.4418893
Filename :
4418893
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2602347
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