Distributed multi TSV 3D clock distribution network in TSV-based 3D IC

Author

Kim, Dayoung ; Kim, Joohee ; Cho, Jonghyun ; Pak, Jun So ; Kim, Joungho ; Lee, Hyungdong ; Lee, Junho ; Park, Kunwoo

Author_Institution

Dept. of Electr. Eng., KAIST, Daejeon, South Korea

fYear

2011

fDate

23-26 Oct. 2011

Firstpage

87

Lastpage

90

Abstract

As TSV-based three-dimensional integrated circuit (3D IC) technology advances rapidly, research on a new scheme for a three-dimensional clock distribution network (3D CDN) in TSV-based 3D IC with low skew, low jitter, low power consumption and small area consumption is needed. In this paper, we propose a new 3D CDN structure with distributed multi-TSV 3D CDN (DMT 3D CDN), and analyze the skew, jitter, power and area consumption. The proposed DMT 3D CDN improves the performance of the skew, jitter and area consumption, although the power consumption is degraded.

Keywords

clock distribution networks; jitter; power consumption; three-dimensional integrated circuits; TSV-based 3D IC; area consumption; distributed multi TSV 3D clock distribution network; jitter; power consumption; skew; three-dimensional integrated circuit; Clocks; Jitter; Power demand; Random access memory; Three dimensional displays; Through-silicon vias; 3-dimensional clock distribution network (3D CDN); 3-dimensional integrated circuit (3D IC); area consumption; distributed multi TSV 3D CDN (DMT 3D CDN); jitter; power consumption; skew; through silicon via (TSV);

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging and Systems (EPEPS), 2011 IEEE 20th Conference on

Conference_Location

San Jose, CA

ISSN

pending

Print_ISBN

978-1-4244-9398-2

Electronic_ISBN

pending

Type

conf

DOI

10.1109/EPEPS.2011.6100194

Filename

6100194