DocumentCode
2603177
Title
Experimental checking of fault susceptibility in a parallel algorithm
Author
Derezinska, Anna ; Sosnowski, Janusz
Author_Institution
Inst. of Comput. Sci., Warsaw Univ. of Technol., Poland
fYear
2002
fDate
2002
Firstpage
33
Lastpage
38
Abstract
We deal with the problem of analyzing fault susceptibility of a parallel algorithm designed for a multiprocessor array (MIMD structure). This algorithm realizes quite a complex communication protocol in the system. We present an original methodology of the analysis based on the use of a software implemented fault injector. The considered algorithm is modeled as a multithreaded application. The experiment set up and results are presented and commented. The performed experiments proved relatively high natural robustness of the analyzed algorithm and showed further possibilities of its improvement.
Keywords
multi-threading; multiprocessing systems; parallel algorithms; program verification; software fault tolerance; MIMD structure; communication protocol; experimental checking; fault susceptibility checking; multiprocessor array; multithreaded application; parallel algorithm; robustness; software implemented fault injector; Parallel algorithms; Parallel processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Computing in Electrical Engineering, 2002. PARELEC '02. Proceedings. International Conference on
Print_ISBN
0-7695-1730-7
Type
conf
DOI
10.1109/PCEE.2002.1115193
Filename
1115193
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