Modeling of ISI in high speed serial I/Os terminated with discontinuities

Timing jitter remains one of the most important design issues for successful operation of high speed serial links. This abstract introduces methods to model and estimate data dependent jitter (DDJ), in presence of capacitive and inductive discontinuities that result due to vias and right angular bends. The model shows that these discontinuities can have significant impact on DDJ, especially at high data rates. The proposed model is extensively verified with SPICE and show very good results.