DocumentCode
2603621
Title
Dynamic process partitioning and migration for irregular applications
Author
Czarnul, Pawel
Author_Institution
Dept. of Comput. Archit., Gdansk Univ. of Technol., Poland
fYear
2002
fDate
2002
Firstpage
123
Lastpage
128
Abstract
Many practical applications generate irregular, nonbalanced divide-and-conquer trees which have different depths, possibly also different numbers of successors at different levels. Efficient parallelization is difficult as it requires dynamic partitioning and mapping of such trees to available processors. Irregular applications can obtain unpredictable intermediate results which then affect creation and termination of processes. The new proposed C++ framework called DAMPVM/DAC offers a combined scheme of dynamic process/data partitioning and migration which enables automatic parallelization of irregular divide-and-conquer applications taking into account processor speeds, network status, changing application requirements as well as external load introduced by other users. Experiments on a network of workstations include adaptive integration with and without process migration as well as static and dynamic codes for image recognition. The latter ones enable to assess both the overhead of the dynamic scheme compared to serial implementations for regular applications and scalability gains for non-uniform images.
Keywords
automatic programming; divide and conquer methods; image recognition; parallel programming; workstation clusters; C++ framework; DAMPVM/DAC; adaptive integration; automatic parallelization; changing application requirements; dynamic codes; dynamic process migration; dynamic process partitioning; external load; image recognition; irregular applications; irregular nonbalanced divide-and-conquer trees; network status; processor speeds; scalability gains; static codes; successors; workstation network; Application software; Computer architecture; Concurrent computing; Electronic mail; Image recognition; Informatics; Object oriented modeling; Runtime; Vegetation mapping; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Computing in Electrical Engineering, 2002. PARELEC '02. Proceedings. International Conference on
Print_ISBN
0-7695-1730-7
Type
conf
DOI
10.1109/PCEE.2002.1115218
Filename
1115218
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