DocumentCode
2603820
Title
VLSI implementation of the universal one-dimensional CAT/ICAT
Author
Chen, Rong-Jian ; Lai, Jui-Lin
Author_Institution
Dept. of Electron. Eng., Nat. Lien-Ho Inst. of Technol., Taiwan
Volume
2
fYear
2002
fDate
2002
Firstpage
279
Abstract
The first VLSI implementation of the universal one-dimensional cellular automata transform (CAT) as well as inverse CAT (ICAT) is present in this paper. To facilitate the development of a universal one-dimensional CAT/ICAT chip, we adopted a CA cell structure with programmable additive rules to generate CA bases, and utilized pipelined phase accumulators to perform the operation of the CAT/ICAT. The simulation result shows that such architecture is suitable for VLSI realization.
Keywords
CMOS digital integrated circuits; VLSI; cellular automata; digital signal processing chips; high-speed integrated circuits; pipeline processing; transforms; CMOS VLSI. chip; VLSI implementation; cellular automata cell structure; inverse cellular automata transform; one-dimensional cellular automata transform; pipelined phase accumulators; programmable additive rules; Additives; Clocks; Fourier transforms; IEEE members; Lattices; Predictive models; Solid modeling; Synchronization; Very large scale integration; Wavelet transforms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. APCCAS '02. 2002 Asia-Pacific Conference on
Print_ISBN
0-7803-7690-0
Type
conf
DOI
10.1109/APCCAS.2002.1115230
Filename
1115230
Link To Document