SOPC design of high performance video display processor

Author

Vinh, Truong Quang ; Park, Ju-Hyun ; Kim, Ji-Hoon ; Kim, Young-Chul

Author_Institution

Dept. of Comput. Eng., Chonnam Nat. Univ., Gwangju, South Korea

fYear

2011

fDate

14-17 June 2011

Firstpage

308

Lastpage

312

Abstract

This paper presents a system-on-a-programmable chip (SOPC) implementation of the video display processor (VDP). The SOPC system employs advanced architecture with hardware / software integrated system. The real-time IP cores are designed to perform video processing and provide high quality pictures. The embedded software controls video parameters, data flow, and user programs. The whole system is implemented in a Cyclone III FPGA Kit. The experimental results show that the SOPC design of VDP provides high quality video with HD resolution.

Keywords

IP networks; field programmable gate arrays; system-on-chip; video signal processing; HD resolution; SOPC design; VDP; cyclone III FPGA kit; embedded software controls video parameters; hardware-software integrated system; high performance video display processor; high quality pictures; real-time IP cores; system-on-a-programmable chip; Algorithm design and analysis; Computer architecture; Driver circuits; IP networks; Noise reduction; Real time systems; Streaming media;

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics (ISCE), 2011 IEEE 15th International Symposium on

Conference_Location

Singapore

ISSN

0747-668X

Print_ISBN

978-1-61284-843-3

Type

conf

DOI

10.1109/ISCE.2011.5973838

Filename

5973838