Author :
Sivasubramani, P. ; Kirsch, P.D. ; Huang, J. ; Park, C. ; Tan, Y.N. ; Gilmer, D.C. ; Young, C. ; Freeman, K. ; Hussain, M.M. ; Harris, R. ; Song, S.C. ; Heh, D. ; Choi, R. ; Majhi, P. ; Bersuker, G. ; Lysaght, P. ; Lee, B.H. ; Tseng, H.-H. ; Jur, J.S. ; L
Abstract :
We demonstrate an amorphous higher-k (k>20) HfTiSiON gate dielectric for sub 32 nm node capable of low equivalent oxide thickness (EOT=0.84 nm). For the first time, we have addressed the thermodynamic instability of TiO2 containing gate dielectrics achieving an acceptably thin SiOx interface (0.7 nm) after 1070degC. 3-10times leakage current reduction is achieved with HfTiSiON vs. HfSiON due to a higher-k TiO2 cap (k=40) on HfSiON. For the first time, an 8% Ion-Ioff improvement of HfTiSiON vs. HfSiON is demonstrated. HfTiSiON shows Ion=1300 muA/mum at Ioff=100 nA/mum for Vdd=1.2 V without stress engineering. HfTiSiON shows bias temperature instability (PBTI) and time dependent dielectric breakdown (TDDB) similar to HfSiON. This work is significant because it demonstrates higher-k scaling benefit and extension of high-k beyond Hf-oxides for sub-32 nm technologies.
Keywords :
MOSFET; hafnium compounds; high-k dielectric thin films; leakage currents; semiconductor device breakdown; semiconductor device models; semiconductor device reliability; thermal stability; titanium compounds; HfTiSiON; amorphous higher-k HfTiSiON gate dielectric; equivalent oxide thickness; leakage current reduction; nMOSFET fabrication; positive bias temperature instability; size 0.7 nm; size 0.84 nm; size 32 nm; thermodynamic instability; time dependent dielectric breakdown; voltage 1.2 V; Amorphous materials; Dielectric breakdown; Dielectric materials; Doping; Plasma temperature; Semiconductor process modeling; Stability; Stress; Thermodynamics; Thickness control;
