High-speed implementation of analysis/synthesis filter banks

The design of a high-speed, two band analysis/synthesis processor suitable for use as a building block to construct larger, tree-structured multirate filter banks is presented. The authors´ design features multiplier-free operation through the use of parallel distributed arithmetic. Two single-bit control signals determine if the processor is configured for low-pass analysis, high-pass analysis, low-pass synthesis, or high-pass synthesis. In the analysis mode, the low-pass and high-pass filter outputs are sub-sampled and multiplexed into a single data stream. When configured for synthesis, the processor up-samples and demultiplexes the data stream before filtering