RTL based scan BIST

Author

Subrata, R.

Author_Institution

Lucent Technol., AT&T Bell Labs., Princeton, NJ

fYear

1997

fDate

19-22, Oct 1997

Firstpage

117

Lastpage

121

Abstract

The synthesis of ASICs from register transfer level (RTL) sources is often a bottom-up iterative process where the synthesis process is carefully controlled to produce a gate-level design which meets the desired constraints. Test logic, such as built-in self-test (BIST), is typically inserted at the gate level. This may cause new violations of timing/area goals, thus causing an expensive cycle of re-optimization on the complete chip at the end of the design process. Performing BIST logic insertion at the RTL source allows synthesis technology to consider test logic while optimizing to meet area/timing goals, thus avoiding an expensive re-optimization. It also provides an opportunity for the sharing of functional and test logic. Scan-based BIST utilizes scan chains to apply random vectors and to observe signal values within the random logic. This paper describes techniques for inserting scan chains at the RTL-VHDL source in the context of scan BIST, and reports its impact on design optimization and fault coverage

Keywords

application specific integrated circuits; built-in self test; circuit optimisation; hardware description languages; logic testing; timing; vectors; ASIC synthesis; BIST logic insertion; RTL-based scan BIST; VHDL; area goals; bottom-up iterative process; built-in self-test; design optimization; fault coverage; functional logic sharing; gate-level design; random logic; random vectors; re-optimization cycle; register transfer level sources; scan chains; signal values; test logic sharing; timing goals; Automatic testing; Built-in self-test; Design optimization; Flip-flops; Logic design; Logic testing; Process control; Process design; Signal processing; Signal synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

VHDL International Users' Forum, 1997. Proceedings

Conference_Location

Arlington, VA

Print_ISBN

0-8186-8180-2

Type

conf

DOI

10.1109/VIUF.1997.623939

Filename

623939