A Novel Fully Self-Aligned SiGe:C HBT Architecture Featuring a Single-Step Epitaxial Collector-Base Process

In this paper we describe a novel fully self-aligned HBT architecture, which enables a maximum reduction of device parasitics. TCAD simulations show that this architecture is capable of achieving f_T/f_max values of 295/425 GHz for an effective emitter area of 0.13times5 mum². In this new process approach, which is fully CMOS compatible, the collector and base are grown in a single-step non-selective epitaxial process on top of pre-defined bipolar areas. This provides new opportunities for collector-base profile engineering. The collector drift region and the extrinsic base are made self-aligned to the emitter by means of a dry etch that removes all polycrystalline material. The remaining epitaxial pedestal defines the intrinsic device and makes deep trench isolation redundant. We describe the major features of the integration scheme and show measured f_T/f_max values of 300/220 GHz on the first fabricated devices with an effective emitter area of 0.13times5 mum².