Title :
Layer reassignment for antenna effect minimization in 3-layer channel routing
Author :
Chen, Zhan ; Koren, Israel
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
Abstract :
As semiconductor technology enters the deep submicron era, reliability has become a major challenge in the design and manufacturing of next generation VLSI circuits. In this paper we focus on one reliability issue-the antenna effect in the context of 3-layer channel routing. We first present an antenna effect model in 3-layer channel routing and, based on this, an antenna effect cost function is proposed. A layer reassignment approach is adopted to minimize this cost function and we show that the layer reassignment problem can be formulated as a network bipartitioning problem. Experimental results show that the antenna effect can be reduced considerably by applying the proposed technique. Compared with previous work, one advantage of our approach is that no extra channel area is required for antenna effect minimization. We show that layer reassignment technique can be used in yield-related critical area minimization in 3-layer channel routing as well. The trade-off between these two objectives is also presented
Keywords :
VLSI; circuit optimisation; integrated circuit layout; integrated circuit reliability; integrated circuit yield; minimisation; VLSI circuit; antenna effect minimization; cost function; critical area; deep submicron semiconductor technology; layer reassignment; network bipartitioning; reliability; three-layer channel routing; yield; Circuits; Cost function; Etching; Minimization; Plasma applications; Plasma materials processing; Routing; Semiconductor device reliability; Target tracking; Very large scale integration;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1996. Proceedings., 1996 IEEE International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
0-8186-7545-4
DOI :
10.1109/DFTVS.1996.571996