Title :
Detection of an antenna effect in VLSI designs
Author :
Maly, Wojciech ; Ouyang, Charles ; Ghosh, Subhendra ; Maturi, Sury
Author_Institution :
Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
This paper describes an extraction methodology capable of detecting “antenna” condition in VLSI designs. Proposed methodology can handle large size designs using standard design rule checking and circuit extraction procedures. Examples of application of the proposed method on industrial IC designs show that occurrence of antenna effect may be an uncontrolled by-product of the design environment
Keywords :
VLSI; circuit layout CAD; integrated circuit layout; integrated circuit reliability; integrated circuit yield; VLSI designs; antenna effect detection; circuit extraction procedures; extraction methodology; plasma induced gate oxide damage; standard design rule checking procedures; Application specific integrated circuits; Circuit synthesis; Data mining; Degradation; Etching; Integrated circuit interconnections; Plasma applications; Production; Pulp manufacturing; Very large scale integration;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1996. Proceedings., 1996 IEEE International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
0-8186-7545-4
DOI :
10.1109/DFTVS.1996.571999
