DocumentCode
2606072
Title
Recursive bi-partitioning of netlists for large number of partitions
Author
Drechsle, R. ; Günther, W. ; Eschbach, T. ; Linhard, L. ; Angst, G.
Author_Institution
Inst. of Comput. Sci., Bremen Univ., Germany
fYear
2002
fDate
2002
Firstpage
38
Lastpage
44
Abstract
In many application in VLSI CAD, a given netlist has to be partitioned into smaller sub-designs which can be handled much better. In this paper we present a new recursive bi-partitioning algorithm that is especially applicable, if a large number of final partitions, e.g. more than 1000, has to be computed. The algorithm consists of two steps. Based on recursive splits the problem is divided into several sub-problems, but with increasing recursion depth more run time is invested. By this an initial solution is determined very fast. The core of the method is a second step, where a very powerful greedy algorithm is applied to refine the partitions. Experimental results are given that compare the new approach to state-of-the-art tools. The experiments show that the new approach outperforms the standard techniques with respect to run time and quality. Furthermore, the memory usage is very low and is reduced in comparison to other methods by more than a factor of four.
Keywords
VLSI; algorithm theory; circuit layout CAD; VLSI CAD; greedy algorithm; netlist partitioning; recursive bi-partitioning algorithm; recursive splits; Algorithm design and analysis; Application software; Computer science; Design automation; Design optimization; Field programmable gate arrays; Greedy algorithms; Partitioning algorithms; Routing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design, 2002. Proceedings. Euromicro Symposium on
Print_ISBN
0-7695-1790-0
Type
conf
DOI
10.1109/DSD.2002.1115349
Filename
1115349
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