DocumentCode
2606614
Title
Performance of remote FPGA-based coprocessors for image-processing applications
Author
Benitez, Domingo
fYear
2002
fDate
2002
Firstpage
268
Lastpage
275
Abstract
This paper describes a performance evaluation of image-processing applications on FPGA-based coprocessors that are part of general-purpose computers. Our experiments show that the maximum speed-up depends on the amount of data processed by the coprocessor. Taking images with 256×256 pixels, a moderate FPGA capacity of 10E+5 CLBs provides two orders of magnitude of performance improvement over a Pentium III processor for most of our benchmarks. However, memory organization and host bus degrade these results. Those benchmarks that can exhibit high performance improvement would require about 200 memory banks of 256 bytes and a host bandwidth as high as 30 GB/s. Based on our quantitative approach, it can be explained why some currently available FPGA-based coprocessors do not provide the achievable level of performance for some image-processing applications.
Keywords
coprocessors; field programmable gate arrays; image processing; performance evaluation; general-purpose computers; host bus; image processing; memory organization; performance evaluation; remote FPGA-based coprocessors; Application software; Bandwidth; Computer applications; Computer architecture; Coprocessors; Data mining; Field programmable gate arrays; Identity-based encryption; Image processing; Pixel;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design, 2002. Proceedings. Euromicro Symposium on
Print_ISBN
0-7695-1790-0
Type
conf
DOI
10.1109/DSD.2002.1115378
Filename
1115378
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