Electrical characterization of SOS n-MOSFETs at cryogenic temperatures

Author

Wang, J. ; Chang, J. ; Raman, V.K. ; Vasude, P.K. ; Viswanathan, C.R.

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

fYear

1989

fDate

3-5 Oct 1989

Firstpage

41

Lastpage

42

Abstract

Summary form only given. The behavior of n-channel MOSFETs fabricated on thin film SOS structures is discussed. The devices exhibit stable electrical characteristics at temperatures down to 5 K, thus suggesting the compatibility of these devices for CMOS circuits. The quasistatic C-V curves exhibit additional peaks at lower temperatures that are possibly due to pipe-diffusion effects prominent in SOS structures. The noise characteristics appear to improve near the kink region, which could be useful in obtaining higher circuit speeds. Thus SOS technology shows significant promise for future high-density CMOS circuits at low temperature

Keywords

carrier mobility; electron device noise; insulated gate field effect transistors; semiconductor device testing; semiconductor-insulator boundaries; thin film transistors; 5 to 300 K; CMOS circuits; circuit speeds; cryogenic temperatures; electron mobilities; high-density CMOS; kink region; n-channel MOSFETs; noise characteristics; pipe-diffusion effects; quasistatic C-V curves; stable electrical characteristics; thin film SOS structures; Capacitance-voltage characteristics; Cryogenics; Frequency measurement; Low-frequency noise; MOSFET circuits; Noise measurement; Semiconductor films; Silicon; Temperature measurement; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOS/SOI Technology Conference, 1989., 1989 IEEE

Conference_Location

Stateline, NV

Type

conf

DOI

10.1109/SOI.1989.69756

Filename

69756