Engineering wafers for the nanotechnology era

Nanotechnology starts at the substrate level. Engineered substrates are one of the most important innovations of the nanotechnology era driven by the vanishing boundary between substrate design and device architecture. SOI substrates, the first engineered substrate of its kind, have made possible an efficient optimization of MOSFET current drive while minimizing the leakage and reducing parasitic elements, thus enhancing the overall IC performance. Strained silicon, hybrid orientation SOI, and germanium on insulator have all added new handles to traditional scaling to further improve device and IC performance. An overview of the advances in Smart Cut engineered substrates and the impact on device performance is given.