DocumentCode
2607183
Title
Development of wafer level underfill material and process
Author
Zhang, Zhuqing ; Sun, Yangyang ; Fan, Lianhua ; Doraiswami, Ravi ; Wong, C.P.
Author_Institution
Sch. of Mater. Sci. & Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2003
fDate
10-12 Dec. 2003
Firstpage
194
Lastpage
198
Abstract
The flip-chip on organic substrate has relied on underfill to enhance the solder joint reliability. The invention of the wafer level underfill technology has greatly improved the production efficiency of the flip-chip process. The development of wafer level underfill materials and processes relies on the fundamental understanding of the underfill curing process. A wafer level underfill material is developed; its curing kinetics is modeled using an autocatalytic model, based on which the B-stage feasibility of the underfill is investigated. The B-stage properties of the underfill are characterized in terms of its Tg, hardness, adhesion, dicing and storage capability. The developed wafer level underfill displays the high curing latency required in the reflow process, as well as good mechanical properties after the B-stage. The underfill is applied on a 6 inch bumped wafer and B-staged. Then the wafer is diced into individual components and assembled onto the FR-4 board.
Keywords
chip scale packaging; curing; encapsulation; flip-chip devices; microassembling; B-stage properties; FR-4 board assembly; adhesion; autocatalytic model; bumped wafer; curing kinetics; curing latency; dicing; flip-chip packaging; hardness; reflow process; solder joint reliability; underfill curing process; wafer level underfill material; wafer level underfill process; Adhesives; Assembly; Curing; Delay; Displays; Kinetic theory; Mechanical factors; Production; Semiconductor device modeling; Soldering;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology, 2003 5th Conference (EPTC 2003)
Print_ISBN
0-7803-8205-6
Type
conf
DOI
10.1109/EPTC.2003.1271515
Filename
1271515
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