Power Transistor Crystal Damage in Inductive Load Switching: A Reliability Concern

A high-voltage n-p-n--n+ type power transistor switching an inductive load for approximately 1000 hours showed no significant variation in the electrical parameters. Infrared scanning, and cross-sectioning and visual inspection of the chip indicated a crystal damage at the n--n+ interface under the center of the emitter. Transmission electron microscopy (TEM) investigations revealed the crystal damage to consist mainly of silicon phosphide precipitate platelets surrounded by dislocation loops and dislocation clusters. An analysis using a two-dimensional mathematical model predicts high electrical and thermal stresses at the damaged location of power transistor during its switching applications.