• DocumentCode
    2607555
  • Title

    Double Level Metallurgy Defect Study

  • Author

    Gregoritsch, A.J.

  • Author_Institution
    IBM General Technology Division, Essex Junction, Vermont 05452
  • fYear
    1978
  • fDate
    28581
  • Firstpage
    28
  • Lastpage
    32
  • Abstract
    A double level metallurgy test chip having purposely induced nonrandom quartz insulation defects (cracks and holes) is used to study the behavior of the defects under accelerated temperature/voltage stress conditions. Data obtained from this stress is analyzed and used to calculate activation energies for an Arrhenius - voltage dependent model.
  • Keywords
    Acceleration; Insulation testing; Life estimation; Silicon; Sputter etching; Stress; Surface cracks; Temperature; Vehicles; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 1978. 16th Annual
  • Conference_Location
    San Diego, CA, USA
  • ISSN
    0735-0791
  • Type

    conf

  • DOI
    10.1109/IRPS.1978.362814
  • Filename
    4208204