Design and implementation of an IP-core based safety-related communication architecture on FPGA

Author

Börcsök, Josef ; Hayek, Ali ; Machmur, Bashier ; Umar, Muhammad

Author_Institution

Dept. of Comput. Archit. & Syst. Programming, Univ. of Kassel, Kassel, Germany

fYear

2009

fDate

29-31 Oct. 2009

Firstpage

1

Lastpage

6

Abstract

Nowadays embedded systems are increasingly used in industrial applications. On the other hand, Intellectual Properties ldquoIPsrdquo are being used in complex roles in such systems. The purpose of this paper is to present the basic ideas behind the building of an IP-based safety-related 1oo2 architecture on FPGA platform. In the first part the complete design of a simple IP-based 8 bit RISC processor and a system on-chip (SoC) design in synthesizable VHDL on FPGA-platform is presented and the safety parameters for the 1oo2 (one out of two) architecture are given. In the second part of the paper, the implementation of the single and of the 1oo2 communication architecture and some results such as a running application are shown.

Keywords

embedded systems; field programmable gate arrays; hardware description languages; industrial property; logic design; reduced instruction set computing; safety-critical software; system-on-chip; 8 bit RISC processor; FPGA; IP-core-based safety-related 1oo2 communication architecture; VHDL; embedded system; industrial application; intellectual property; system on-chip design; Application software; Central Processing Unit; Computer architecture; Control systems; Field programmable gate arrays; Hardware; Intellectual property; Logic devices; Safety; System-on-a-chip; 1oo2 architecture; FPGAs; Safety-related Systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Information, Communication and Automation Technologies, 2009. ICAT 2009. XXII International Symposium on

Conference_Location

Bosnia

Print_ISBN

978-1-4244-4220-1

Electronic_ISBN

978-1-4244-4221-8

Type

conf

DOI

10.1109/ICAT.2009.5348448

Filename

5348448