DocumentCode
2608181
Title
Active compensation of parasitic capacitances for very high frequency CMOS DACs
Author
Brigati, S. ; Caiulo, G. ; Maloberti, F. ; Torelli, G.
Author_Institution
Dipartimento di Elettronica, Pavia Univ., Italy
fYear
1993
fDate
3-6 May 1993
Firstpage
1208
Abstract
High frequency digital-analog (DACs) requiring an output buffer find a speed limitation in the overall input capacitive load of the buffer. An active scheme for the compensation of such a load, including the parasitic capacitances coming from reversely biased junctions associated with analog switches is presented. Computer simulations on a given architecture (10-b DAC) show the effectiveness of the proposed approach
Keywords
CMOS integrated circuits; capacitance; compensation; digital-analogue conversion; D/A convertors; VHF operation; active compensation; analog switches; parasitic capacitances; reversely biased junctions; speed limitation; very high frequency CMOS DACs; Application software; CMOS technology; Communication switching; Computer architecture; Computer simulation; Frequency; HDTV; Matrix converters; Parasitic capacitance; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location
Chicago, IL
Print_ISBN
0-7803-1281-3
Type
conf
DOI
10.1109/ISCAS.1993.393945
Filename
393945
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