A performance analysis for single-walled metallic Carbon Nanotubes as global and intermediate on-chip interconnects

Author

Hashempour, Hamidreza ; Lombardi, Fabrizio

Author_Institution

Indep. Researcher, Tehran

fYear

2007

fDate

2-5 Aug. 2007

Firstpage

1317

Lastpage

1320

Abstract

This paper analyzes several delay estimates for metallic carbon nanotubes (CNT) as interconnects of very large scale integrated (VLSI) chips. A study of the 2005 edition of the international technology roadmap (ITRS) [1] for global/intermediate interconnects is presented to highlight the significant issues encountered with the projected performance of copper/aluminum interconnects till 2020. Then a worst case performance analysis of metallic CNTs is presented and compared versus copper interconnects. It is evaluated that the RC delay of CNTs does not meet the future RC delay requirements of on-chip intermediate and global wires.

Keywords

VLSI; carbon nanotubes; delay estimation; integrated circuit interconnections; delay estimates; metallic carbon nanotubes; on-chip global wires; on-chip interconnects; on-chip intermediate wires; very large scale integrated chips; Carbon nanotubes; Conductivity; Copper; Delay estimation; Dielectric materials; Integrated circuit interconnections; Performance analysis; Solid modeling; Very large scale integration; Wires; Carbon Nanotube; Global Interconnect; Intermediate Interconnect; Metallic CNT; RC Delay;

fLanguage

English

Publisher

ieee

Conference_Titel

Nanotechnology, 2007. IEEE-NANO 2007. 7th IEEE Conference on

Conference_Location

Hong Kong

Print_ISBN

978-1-4244-0607-4

Electronic_ISBN

978-1-4244-0608-1

Type

conf

DOI

10.1109/NANO.2007.4601425

Filename

4601425