Demonstration of high performance transistors with PVD metal gate

Transistors devices have been fabricated in the traditional gate-first approach with HfO₂ and PVD TaN as the gate electrode. The stability of the PVD metal with the high dielectric constant material is studied in terms of the gate leakage, capacitance, transistor properties and reliability. Comparison of the PVD devices with the same devices using ALD TaN is performed to understand the influence of the PVD process on device properties. It is concluded that PVD deposition of metal gates with 1000°C poly activation anneal can be performed with no measurable damage to the dielectric and full thermal stability. Furthermore, one can realize high performance transistors with proper engineering of the PVD process.