Title :
SMT-Based Bounded Model Checking for Real-Time Systems (Short Paper)
Author_Institution :
State Key Lab. of Comput. Sci., Chinese Acad. of Sci., Beijing
Abstract :
SAT-based bounded model checking has a high complexity in dealing with real-time systems. SMT solvers can generalize SAT solving by adding the ability to handle arithmetic and other decidable theories. With this advantage, if we use SMT in bounded model checking for real-time systems instead of SAT, the clocks can be represented as integer or real variables directly and clock constraints can be represented as linear arithmetic expressions. This makes the checking procedure more efficient. We use TCTL to specify the properties of real-time systems.
Keywords :
binary decision diagrams; SMT-based bounded model checking; TCTL; clock constraints; linear arithmetic expressions; real-time systems; Arithmetic; Binary decision diagrams; Boolean functions; Clocks; Data structures; Encoding; Laboratories; Real time systems; Software quality; Surface-mount technology; BMC; SMT; real-time systems;
Conference_Titel :
Quality Software, 2008. QSIC '08. The Eighth International Conference on
Conference_Location :
Oxford
Print_ISBN :
978-0-7695-3312-4
DOI :
10.1109/QSIC.2008.10