DocumentCode
2608995
Title
Fatigue life estimation of a bed-of-nails ultra-fine-pitch wafer level package using the macro-micro modelling approach
Author
Cling, A.C. ; Tay, Andrew A O ; Lim, K.M.
Author_Institution
Nano/Microsystems Integration Lab., Nat. Univ. of Singapore, Singapore
fYear
2003
fDate
10-12 Dec. 2003
Firstpage
675
Lastpage
682
Abstract
This paper presents package warpage and interconnect fatigue life estimates of bed-of-nails (BON) interconnect in a 20 mm by 20 mm package with 100 μm pitch. The modelling was carried out in two stages using the macro-micro modelling approach. The effect of BON orientation, as well as chip thickness and substrate CTE (coefficient of thermal expansion) on fatigue life is discussed. The results suggest that the substrate CTE will continue to be the key factor in determining the thermo-mechanical reliability of a large package with small interconnects.
Keywords
fatigue; fine-pitch technology; finite element analysis; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; integrated circuit reliability; thermal expansion; 100 micron; 20 mm; BON orientation; CTE; FEA; bed-of-nails interconnect; chip thickness; interconnect fatigue life; interconnect fatigue life estimation; macro-micro modelling; package warpage; substrate coefficient of thermal expansion; thermo-mechanical reliability; ultra-fine-pitch package; wafer level package; Capacitive sensors; Copper; Fatigue; Lead; Life estimation; Packaging; Semiconductor device modeling; Thermal expansion; Thermomechanical processes; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology, 2003 5th Conference (EPTC 2003)
Print_ISBN
0-7803-8205-6
Type
conf
DOI
10.1109/EPTC.2003.1271605
Filename
1271605
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