DocumentCode
2609766
Title
On multiple fault detection of parity checkers
Author
Wu, Cheng-Juei ; Jone, Wen-Ben
Author_Institution
Dept. of Comput. Sci., New Mexico Technol., Socorro, NM, USA
fYear
1993
fDate
3-6 May 1993
Firstpage
1515
Abstract
The multiple fault detection of parity checkers is investigated. It is found that any multiple stuck-at fault occurring on a parity checker can be completely detected using test patterns provided by the identity matrix plus zero vector. The identity matrix can also detect all multiple general bridging faults, if the bridgings result in a wired-AND effect. Test patterns generated from the identity matrix and binary matrix are required to detect the multiple bridging faults which yield a wired-OR connection
Keywords
automatic testing; fault diagnosis; fault location; integrated circuit testing; logic testing; binary matrix; bridging faults; identity matrix; multiple fault detection; multiple stuck-at fault; parity checkers; test patterns; wired-AND effect; wired-OR connection; zero vector; Circuit faults; Circuit testing; Computer errors; Computer science; Digital systems; Electrical fault detection; Fault detection; Feedback; Reliability engineering; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location
Chicago, IL
Print_ISBN
0-7803-1281-3
Type
conf
DOI
10.1109/ISCAS.1993.394023
Filename
394023
Link To Document