DocumentCode
2609777
Title
Functional test pattern generation for asynchronous circuits
Author
Ker, Jar-Shone ; Kuo, Yau-Hwang ; Liu, Bin-Da
Author_Institution
Nat. Cheng Kung Univ., Tainan, Taiwan
fYear
1993
fDate
3-6 May 1993
Firstpage
1519
Abstract
A functional test generation algorithm is developed. It generates test patterns directly from a graphical model, called the signal transition graph (STG). STG is used for the design and modeling of asynchronous circuits. Emphasis is placed on test generation for asynchronous circuits. A token propagation fault model is proposed to model the fault effects exhibiting on STG. The equivalence/dominance fault collapsing analysis is applied to reduce the number of faults to be considered
Keywords
asynchronous circuits; automatic testing; fault diagnosis; integrated circuit testing; logic testing; signal flow graphs; asynchronous circuits; equivalence/dominance fault collapsing analysis; functional test generation algorithm; graphical model; signal transition graph; token propagation fault model; Asynchronous circuits; Binary decision diagrams; Circuit faults; Circuit testing; Disk drives; Logic circuits; Machine vision; Signal generators; Test pattern generators; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location
Chicago, IL
Print_ISBN
0-7803-1281-3
Type
conf
DOI
10.1109/ISCAS.1993.394024
Filename
394024
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