Title :
A CORDIC-based VLSI array for computing 2D discrete Hartley transform
Author :
Guo, J.-I. ; Liu, Chi-Min ; Jen, C.-W.
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
The inseparability of the 2D discrete Hartley transform (DHT) makes its VLSI design and hardware realization much more expensive. To solve this problem, a new CORDIC-based 2D DHT algorithm and the associated array design are presented. By exploiting the CORDIC (coordinate rotations digital computer) property, the row/column decomposition can be successfully applied to reduce the computational complexity enormously without paying decomposition overhead. The array features systolic computing style, the CORDIC structure of processing elements (PEs), low input/output (I/O) cost, and simple hardware
Keywords :
Hartley transforms; VLSI; computational complexity; digital arithmetic; digital signal processing chips; systolic arrays; 2D discrete Hartley transform; CORDIC-based 2D DHT algorithm; VLSI design; associated array design; computational complexity; decomposition overhead; hardware realization; row/column decomposition; systolic computing style; Algorithm design and analysis; Computational complexity; Computer science; DH-HEMTs; Discrete Fourier transforms; Discrete cosine transforms; Discrete transforms; Hardware; Kernel; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
DOI :
10.1109/ISCAS.1993.394037
