• DocumentCode
    2610086
  • Title

    FPGA Based Real-Time Tracking Approach with Validation of Precision and Performance

  • Author

    Bochem, Alexander ; Kent, Kenneth B. ; Herpers, Rainer

  • Author_Institution
    Fac. of Comput. Sci., Univ. of New Brunswsick, Fredericton, NB, Canada
  • fYear
    2012
  • fDate
    5-8 Sept. 2012
  • Firstpage
    122
  • Lastpage
    127
  • Abstract
    This paper presents the implementation and validation of a tracking approach for image processing in hardware. It compares the implementation for the addressed problem on a Field Programmable Gate Array (FPGA) with a software implementation for a General Purpose Processor (GPP) architecture. For both solutions the implementation costs for their development is an important aspect in the validation. This research project is motivated by the MI6 project of the Computer Vision research group, which is located at the Bonn-Rhein-Sieg University of Applied Sciences. The intent of the MI6 project is the tracking of a user in an immersive environment. In this research work the development and validation of a detection system for BLOBs on a Cyclone II FPGA from Altera has been implemented. The analysis of the hardware solution showed a similar precision for the tracking as the software approach. One problem is the large increase of allocated resources when extending the system to process more objects. The implementation of the tracking approach in hardware required much more effort than the software solution. The design of high level problems in hardware for this case are more expensive than the software implementation. The results of the implementation indicate that a mixed hardware/software solution would provide optimal results.
  • Keywords
    computer vision; electronic engineering computing; field programmable gate arrays; BLOB; Bonn-Rhein-Sieg University of Applied Sciences; Cyclone II FPGA; FPGA based real-time tracking approach; GPP architecture; MI6 project; computer vision research group; field programmable gate array; general purpose processor architecture; image processing; mixed hardware-software solution; Data visualization; Euclidean distance; Field programmable gate arrays; Hardware; Libraries; Software; Target tracking; BLOB Tracking; Euclidean Distance; FPGA; Image Processing; Threading Building Blocks;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design (DSD), 2012 15th Euromicro Conference on
  • Conference_Location
    Izmir
  • Print_ISBN
    978-1-4673-2498-4
  • Type

    conf

  • DOI
    10.1109/DSD.2012.62
  • Filename
    6386879