• DocumentCode
    2610177
  • Title

    Fault tolerant Newton-Raphson dividers using time shared TMR

  • Author

    Gallagher, W.L. ; Swartzlander, Earl E., Jr.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
  • fYear
    1996
  • fDate
    6-8 Nov 1996
  • Firstpage
    240
  • Lastpage
    248
  • Abstract
    The Newton-Raphson method is a popular means of performing division on modern processors, as it can utilize the multiplication hardware already on chip and converge quickly to a solution. However, high-precision multiplications are not required for the early iterations of the algorithm. Furthermore, rounding the quotient by computing the inverse function may not require a full precision computation. By using a smaller multiplier when less precision is required, and using the same multiplier with feedback paths when more precision is required, a smaller, and sometimes faster, divider can be realized. This approach lends itself to time shared triple modular redundancy, where space is saved over traditional TMR with a reasonable penalty to latency
  • Keywords
    Newton-Raphson method; dividing circuits; fault tolerant computing; redundancy; time-sharing systems; Newton-Raphson divider; fault tolerance; feedback; inverse function; iteration algorithm; latency; time shared triple modular redundancy; Computer errors; Convergence; Delay; Error correction; Fault tolerance; Feedback; Newton method; Read only memory; Redundancy; USA Councils;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 1996. Proceedings., 1996 IEEE International Symposium on
  • Conference_Location
    Boston, MA
  • ISSN
    1550-5774
  • Print_ISBN
    0-8186-7545-4
  • Type

    conf

  • DOI
    10.1109/DFTVS.1996.572030
  • Filename
    572030