DocumentCode
2610189
Title
Balancing of fault tolerance in the new version of the FERMI Channel chip: a functional evaluation
Author
Antola, Anna ; Breveglieri, Luca
Author_Institution
Dipt. di Elettrotecnica e Inf., Politecnico di Milano, Italy
fYear
1996
fDate
6-8 Nov 1996
Firstpage
249
Lastpage
257
Abstract
A prototype of the “Channel chip” of the FERMI microsystem has been designed and fabricated (version 1, 1994), being currently under test (1995-96). Future implementations (version 11, 1996) require a structural refinement and a reduction of dimension of the chip. These modifications require in turn a redistribution and a redesign of the implemented fault tolerance features. In this paper guide-lines for this task are presented and a proposal is discussed
Keywords
data acquisition; detector circuits; fault tolerant computing; high energy physics instrumentation computing; nuclear electronics; Channel chip; FERMI microsystem; fault tolerance; Collaborative work; Data acquisition; Fault tolerance; Industrial electronics; Large Hadron Collider; Nuclear electronics; Physics; Proposals; Prototypes; Redundancy;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 1996. Proceedings., 1996 IEEE International Symposium on
Conference_Location
Boston, MA
ISSN
1550-5774
Print_ISBN
0-8186-7545-4
Type
conf
DOI
10.1109/DFTVS.1996.572031
Filename
572031
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