• DocumentCode
    2610249
  • Title

    Redundancy Reliability

  • Author

    Crook, Dwight L. ; Meyer, William K.

  • Author_Institution
    Intel Corporation, 3585 SW 198, Aloha, Oregon 97007
  • fYear
    1981
  • fDate
    29677
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    Programmable redundant row and column elements are presently being used as a yield enhancement tool on the more advanced high density memory devices. This paper summarizes a comprehensive reliability study which was conducted to insure acceptable reliability standards on products using redundancy. Data on fuse programming are presented which indicate acceptable fuse reliability. Also, data are presented which show that the potential problem of contamination entering through the fuse holes has been eliminated with guardrings and circuit layout. Other potential reliability problems with the redundancy concept such as the effects of process defects interacting with adjacent cells and defect clustering were evaluated. The results indicate that standard screening techniques used in previous NMOS technologies are adequate to achieve acceptable reliability. Product data are presented which indicate devices using redundancy are as reliable as previous generation memory devices.
  • Keywords
    Circuits; Contamination; Costs; Electronics industry; Fuses; Geometry; MOS devices; Redundancy; Semiconductor memory; Technological innovation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 1981. 19th Annual
  • Conference_Location
    Las Vegas, NV, USA
  • ISSN
    0735-0791
  • Type

    conf

  • DOI
    10.1109/IRPS.1981.362964
  • Filename
    4208363