Title :
Efficient variable ordering heuristics for shared ROBDD
Author :
Chung, Pi-Yu ; Hajj, Ibrahim N. ; Patel, Janak H.
Author_Institution :
Dept. Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
Abstract :
Several ordering heuristics for shared, reduced and ordered binary decision diagrams (ROBDDs) are described. These heuristics are tested on ISCAS and MCNC benchmark circuits. In all examples, the ordering is accomplished in a few seconds and generates smaller shared ROBDDs than other previously proposed heuristics. The objective is to provide a fast way to generate shared ROBDDs of reasonable sizes. The results could be used as a good initial solution to any semi-exhaustive ordering method to further reduce the sizes
Keywords :
combinational circuits; logic design; minimisation of switching nets; ISCAS; MCNC; benchmark circuits; initial solution; reduced and ordered binary decision diagrams; semi-exhaustive ordering method; shared ROBDD; variable ordering heuristics; Benchmark testing; Boolean functions; Circuit simulation; Circuit testing; Contracts; Data structures; Guidelines; Input variables; Logic design; Packaging;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
DOI :
10.1109/ISCAS.1993.394067