DocumentCode :
261072
Title :
An improved hardware implementation of the one hot Residue Number System
Author :
Gayoso, Carlos Arturo ; Gonzalez, Claudio ; Arnone, Leonardo ; Rabini, Miguel ; Castineira Moreira, Jorge
Author_Institution :
Electron. Component Lab., Mar del Plata Univ., Mar del Plata, Argentina
fYear :
2014
fDate :
13-15 Aug. 2014
Firstpage :
24
Lastpage :
27
Abstract :
Residue Number System (RNS) is a kind of numerical representation that allows to divide a given arithmetic operation done over a binary numerical representation with a determined number of bits, into several smaller operations that are performed in parallel, and use binary numerical representations of smaller number of bits. There are many possible implementations of RNS, but the one of highest processing speed is the so called One Hot Residue Number System (OHRNS). The main disadvantage of this implementation is that it requires order m2 number of transistors for a modulo-m operation. In this paper a modified version of OHRNS, called OHRNS2 is presented, which perform as well as the original OHRNS, but with significant less hardware requirements. A generalized system is also presented, and called OHRNSn.
Keywords :
residue number systems; OHRNS2; OHRNSn; RNS; arithmetic operation; binary numerical representation; improved hardware implementation; modulo-m operation; one hot residue number system; Adders; Conferences; Digital signal processing; Educational institutions; Electronic components; Hardware; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Systems (SASE/CASE), 2014 Fifth Argentine Symposium and Conference on
Conference_Location :
Buenos Aires
Print_ISBN :
978-987-45523-0-3
Type :
conf
DOI :
10.1109/SASE-CASE.2014.6914463
Filename :
6914463
Link To Document :
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