• DocumentCode
    2611158
  • Title

    Full adder-based inner product step processors for residue and quadratic residue number systems

  • Author

    Kim, Seon Wook ; Stouraitis, Thanos ; Skavantzos, Alexander

  • Author_Institution
    C/spl I.sup/3I Syst. Div. Inst. for Defense Inf. Syst., Seoul, South Korea
  • fYear
    1993
  • fDate
    3-6 May 1993
  • Firstpage
    1821
  • Abstract
    A full adder-based arithmetic unit of a modulus m, called an FA-based AUm, is proposed. It performs both addition and multiplication at the same time. Since the proposed AUms use full adders as their basic units, they lead to modular and regular designs which result in lower cost and easier implementation in VLSI
  • Keywords
    VLSI; adders; digital signal processing chips; residue number systems; RNS; VLSI; adder-based inner product step processors; full adder-based arithmetic unit; quadratic residue number systems; regular designs; Adders; Arithmetic; Computer architecture; Costs; Digital signal processing; Gold; Information systems; Programmable logic arrays; Read only memory; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
  • Conference_Location
    Chicago, IL
  • Print_ISBN
    0-7803-1281-3
  • Type

    conf

  • DOI
    10.1109/ISCAS.1993.394100
  • Filename
    394100
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2611158